NXP Semiconductors /MIMXRT1021 /IOMUXC_GPR /GPR16

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Interpret as GPR16

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INIT_ITCM_EN_0)INIT_ITCM_EN 0 (INIT_DTCM_EN_0)INIT_DTCM_EN 0 (FLEXRAM_BANK_CFG_SEL_0)FLEXRAM_BANK_CFG_SEL 0CM7_INIT_VTOR

INIT_DTCM_EN=INIT_DTCM_EN_0, FLEXRAM_BANK_CFG_SEL=FLEXRAM_BANK_CFG_SEL_0, INIT_ITCM_EN=INIT_ITCM_EN_0

Description

GPR16 General Purpose Register

Fields

INIT_ITCM_EN

ITCM enable initialization out of reset

0 (INIT_ITCM_EN_0): ITCM is disabled

1 (INIT_ITCM_EN_1): ITCM is enabled

INIT_DTCM_EN

DTCM enable initialization out of reset

0 (INIT_DTCM_EN_0): DTCM is disabled

1 (INIT_DTCM_EN_1): DTCM is enabled

FLEXRAM_BANK_CFG_SEL

FlexRAM bank config source select

0 (FLEXRAM_BANK_CFG_SEL_0): use fuse value to config

1 (FLEXRAM_BANK_CFG_SEL_1): use FLEXRAM_BANK_CFG to config

CM7_INIT_VTOR

Vector table offset register out of reset

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